Digital Logic & Microprocessor — Sequential Logic Circuit, NEC licence examination syllabus (Nepal Engineering Council).
Registers: flip-flops working as a team
One flip-flop stores a bit. Eight sharing a clock store a byte.
A single flip-flop is barely useful — real data comes in words. Wire eight D flip-flops to a common clock and you have an 8-bit register, the fundamental storage unit inside every processor. The interesting variations come from how data gets in and out: all bits at once (parallel) or one at a time down a wire (serial). Four combinations exist, and each solves a different problem.
The four types
Named by [input mode][output mode]:
SISO — Serial In, Serial Out
Data enters one bit per clock, exits one bit per clock.
Uses: delay line, serial data buffer.
n clocks to load, n clocks to read.
SIPO — Serial In, Parallel Out
Data shifts in one bit at a time; all bits readable at once.
Uses: SERIAL-TO-PARALLEL conversion (UART receiver).
n clocks to load, instant read.
PISO — Parallel In, Serial Out
All bits loaded at once; shifted out one at a time.
Uses: PARALLEL-TO-SERIAL conversion (UART transmitter).
1 clock to load, n clocks to read.
PIPO — Parallel In, Parallel Out
Everything at once. This is a plain storage register.
Uses: CPU registers, data latches.
1 clock to load, instant read.
The core trade-off: parallel is fast but needs many wires; serial is slow but needs one. Inside a chip, wires are cheap and speed is everything, so registers are parallel. Between devices — a USB cable, a network link, a satellite feed — wires are expensive, so data goes serial. A UART is literally a PISO on the transmit side and a SIPO on the receive side, converting between the two worlds.
Worked numerical 1 — load and read times
An 8-bit register is clocked at 1 MHz. Compare the total time to load and read data for each of the four types.
Clock period = 1/1 MHz = 1 µs per clock
SISO: load 8 clocks + read 8 clocks = 16 clocks = 16 µs
SIPO: load 8 clocks + read 0 = 8 clocks = 8 µs
PISO: load 1 clock + read 8 clocks = 9 clocks = 9 µs
PIPO: load 1 clock + read 0 = 1 clock = 1 µs
PIPO is 16× faster than SISO — but needs 8 input wires and
8 output wires (16 total) versus SISO's 2.
Wire count comparison for 8 bits:
SISO: 1 in + 1 out = 2 signal wires
SIPO: 1 in + 8 out = 9
PISO: 8 in + 1 out = 9
PIPO: 8 in + 8 out = 16
That's the whole engineering decision in two tables.
Worked numerical 2 — a UART's shift registers
A UART transmits at 9600 baud with 8 data bits, 1 start bit and 1 stop bit. Find the time per character and the shift-register clock rate.
Bits per character = 1 start + 8 data + 1 stop = 10 bits
Time per bit = 1/9600 = 104.17 µs
Time per character = 10 × 104.17 = 1041.7 µs ≈ 1.04 ms
Characters per second = 9600/10 = 960 cps
The PISO shift register on the transmit side is clocked at
9600 Hz — one shift per bit time.
The SIPO on the receive side is usually clocked at 16×
the baud rate (153 600 Hz) so it can sample each bit near
its centre and detect the start-bit edge accurately.
Note the overhead: 2 of every 10 bits are framing, so the
useful data rate is only 9600 × 8/10 = 7680 bits/s.
Worked numerical 3 — bidirectional shift register
Design a 4-bit register that can shift left or right depending on a control line, using MUXes.
Each flip-flop's D input comes from a 2:1 MUX:
DIR = 0 (shift RIGHT): D_i = Q_(i-1)
DIR = 1 (shift LEFT): D_i = Q_(i+1)
So for FF1:
MUX inputs: Q0 (for right) and Q2 (for left)
Select: DIR
Hardware: 4 flip-flops + 4 two-to-one MUXes.
Example — start with Q = 1011:
Shift RIGHT with 0 in: 0101
Shift LEFT with 0 in: 0110
Arithmetic significance:
shift LEFT by 1 = multiply by 2
shift RIGHT by 1 = divide by 2 (unsigned)
1011 = 11
shift left → 10110 = 22 ✔ (×2)
shift right → 0101 = 5 ✔ (11÷2 = 5, remainder discarded)
This is why shifts are the cheapest multiply/divide a CPU
has, and why compilers turn x*8 into x<<3.
💡 Exam angle: the four types with their names expanded and one application each is a reliable 4-mark question. Draw the SIPO shift register with the shifting table showing bits advancing one position per clock. Remember shift-left = ×2 and shift-right = ÷2; papers often ask for the arithmetic interpretation.
Syllabus points
SISO, SIPO, PISO, PIPO
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