Digital Logic & Microprocessor — Combinational and Arithmetic Circuits, NEC licence examination syllabus (Nepal Engineering Council).
Signed and Unsigned Operations: the same bits, two different meanings
10000000 is either 128 or −128. Only the programmer knows which.
Here's something that surprises people: the hardware doesn't know whether your number is signed. The bit pattern 11111111 is 255 to an unsigned interpretation and −1 to a signed one, and the adder produces the same result bits either way. What differs is which flag you check to detect an error — and getting that wrong is the source of a whole category of real software bugs.
The three representations
For 4 bits, comparing how −5 is stored:
SIGNED MAGNITUDE: 1 101 (sign bit 1, magnitude 101 = 5)
ONE'S COMPLEMENT: 1010 (invert 0101)
TWO'S COMPLEMENT: 1011 (invert then +1)
Ranges for n bits:
Unsigned 0 to 2ⁿ − 1
Signed magnitude −(2ⁿ⁻¹ − 1) to +(2ⁿ⁻¹ − 1)
One's complement −(2ⁿ⁻¹ − 1) to +(2ⁿ⁻¹ − 1)
Two's complement −2ⁿ⁻¹ to +(2ⁿ⁻¹ − 1) ← asymmetric
8-bit examples:
unsigned: 0 to 255
two's complement: −128 to +127
Carry versus Overflow — the distinction that matters
CARRY flag — relevant for UNSIGNED arithmetic.
Set when the result exceeds the unsigned range.
= carry out of the most significant bit.
OVERFLOW flag — relevant for SIGNED arithmetic.
Set when the signed result is wrong.
= XOR of the carry INTO the MSB and the carry OUT of it.
Overflow = C_in(MSB) ⊕ C_out(MSB)
Practical overflow rule for signed addition:
Overflow occurs ONLY when both operands have the SAME
sign and the result has the OPPOSITE sign.
(Adding numbers of different signs can never overflow.)
Both flags are computed for every operation, always. The processor doesn't choose — you choose which one to test. After adding two values you believe are unsigned, check Carry. After adding values you believe are signed, check Overflow. Checking the wrong one is how integer bugs slip into shipped software.
Worked numerical 1 — the same addition, two interpretations
Add 1001 + 0101 in 4 bits. Interpret the result as unsigned, then as signed.
1001
+ 0101
───────
1110 no carry out (C₄ = 0)
UNSIGNED interpretation:
1001 = 9, 0101 = 5, 1110 = 14
9 + 5 = 14 ✔ correct, and C₄ = 0 means no unsigned overflow
(14 fits in 0–15)
SIGNED (two's complement) interpretation:
1001 = −7, 0101 = +5, 1110 = −2
−7 + 5 = −2 ✔ correct
Overflow check:
carry INTO MSB = 0 (from bit 2: 0+1+0 = 1, no carry)
carry OUT of MSB = 0
Overflow = 0 ⊕ 0 = 0 ✔ no signed overflow
Both interpretations are correct here. The same bits, both
readings valid, no flags set.
Worked numerical 2 — signed overflow with no carry
Add 0110 + 0101 (6 + 5) in 4 bits and analyse both flags.
0110 (+6)
+ 0101 (+5)
───────
1011
UNSIGNED: 6 + 5 = 11, and 1011 = 11 ✔ correct
C₄ = 0 → no unsigned overflow. Fine.
SIGNED: 1011 = −5 in two's complement
+6 + 5 should be +11, but we got −5 ✗ WRONG
Overflow check:
bit 2: 1+1+0 → sum 0, carry 1
carry INTO MSB = 1
carry OUT of MSB = 0
Overflow = 1 ⊕ 0 = 1 ✔ SIGNED OVERFLOW detected
Confirms the same-sign rule: both operands positive, result
negative → overflow. The signed range is only −8 to +7, and
+11 doesn't fit.
Key lesson: unsigned was fine, signed overflowed. That is
why the two flags must be separate.
Worked numerical 3 — unsigned carry with no signed overflow
Add 1000 + 1001 (in 4 bits) and analyse.
1000
+ 1001
───────
1 0001
UNSIGNED: 8 + 9 = 17, but 0001 = 1 ✗ WRONG
C₄ = 1 → UNSIGNED OVERFLOW (carry set). Correct diagnosis:
17 exceeds the 0–15 range.
SIGNED: 1000 = −8, 1001 = −7, result 0001 = +1
−8 + −7 = −15, but we got +1 ✗ also wrong
Overflow check:
bit 2: 0+0+0 = 0, no carry → carry INTO MSB = 0
carry OUT of MSB = 1
Overflow = 0 ⊕ 1 = 1 ✔ SIGNED OVERFLOW too
Here BOTH flags are set, because both interpretations
overflowed (−15 is below −8; 17 is above 15).
Summary of the three examples:
Example 1: C=0, V=0 — both correct
Example 2: C=0, V=1 — unsigned fine, signed broken
Example 3: C=1, V=1 — both broken
A case with C=1, V=0 also exists: try 1111 + 0001 (−1 + 1),
which gives 1 0000. Carry set (unsigned 15+1=16 overflows)
but signed −1+1 = 0 is perfectly correct.
Worked numerical 4 — sign extension
Extend the 4-bit signed values 0110 and 1011 to 8 bits. Why can't you just pad with zeros?
POSITIVE value 0110 (+6):
pad with zeros → 0000 0110 = +6 ✔
NEGATIVE value 1011 (−5):
pad with ZEROS → 0000 1011 = +11 ✗ WRONG!
pad with ONES → 1111 1011 = ?
Check: 1111 1011, two's complement
invert: 0000 0100, +1 → 0000 0101 = 5
so 1111 1011 = −5 ✔ CORRECT
RULE — SIGN EXTENSION: replicate the sign bit (the MSB)
into all the new high-order positions.
positive → pad with 0s
negative → pad with 1s
For UNSIGNED values, always pad with zeros (zero extension).
This is why processors have separate MOVSX (move with sign
extend) and MOVZX (move with zero extend) instructions —
and why casting a signed char to int in C behaves
differently from casting an unsigned char.
💡 Exam angle: the carry versus overflow distinction is the highest-value concept — define both, give the overflow formula (C_in ⊕ C_out of the MSB), and state the same-sign rule. Examiners love giving one addition and asking for both flags plus both interpretations. Also know the asymmetric two's complement range (−2ⁿ⁻¹ to +2ⁿ⁻¹−1) and sign extension.
Syllabus points
Signed representations
Operations on signed/unsigned numbers (numerical)
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