Binary Addition

Digital Logic & Microprocessor — Combinational and Arithmetic Circuits, NEC licence examination syllabus (Nepal Engineering Council).

Binary Addition: the half adder, the full adder, and the carry problem

Every calculation your computer performs comes back to these two circuits.

Adding two bits gives a sum and possibly a carry. That's a half adder. But to add multi-bit numbers you must also accept a carry coming in from the column to the right — that's a full adder. Chain full adders together and you can add any width. The interesting engineering problem isn't the logic; it's that the carry has to travel through every stage, and that ripple is what limits how fast a processor can add.

Half adder

Adds two bits, no carry-in. A B | Sum Carry ─────┼──────────── 0 0 | 0 0 0 1 | 1 0 1 0 | 1 0 1 1 | 0 1 ← 1+1 = 10₂ Sum = A ⊕ B (XOR) Carry = A · B (AND) Just two gates. Note Sum is XOR — which is why XOR is sometimes called the "sum" gate.

Full adder

Adds two bits PLUS a carry-in. A B Cin | Sum Cout ──────────┼─────────── 0 0 0 | 0 0 0 0 1 | 1 0 0 1 0 | 1 0 0 1 1 | 0 1 1 0 0 | 1 0 1 0 1 | 0 1 1 1 0 | 0 1 1 1 1 | 1 1 Sum = A ⊕ B ⊕ Cin Cout = AB + Cin(A ⊕ B) = AB + ACin + BCin (either form is valid) Built from TWO half adders + one OR gate.

Read the Sum column: it is 1 whenever an odd number of the three inputs is 1. That's exactly what a 3-input XOR does. And Cout is 1 whenever two or more inputs are 1 — the majority function from the SOP topic. Recognising these two patterns means you never need to memorise the full adder's equations.

Worked numerical 1 — 4-bit addition traced through the carries

Add 1011₂ + 0110₂ using a 4-bit ripple-carry adder, showing every carry.

C₃C₂C₁C₀ carries 1 1 1 0 A = 1 0 1 1 (11 decimal) B = 0 1 1 0 (6 decimal) ───────────────── Sum = 1 0 0 0 1 (17 decimal) Bit by bit: bit 0: A=1, B=0, Cin=0 → Sum=1, Cout=0 bit 1: A=1, B=1, Cin=0 → Sum=0, Cout=1 bit 2: A=0, B=1, Cin=1 → Sum=0, Cout=1 bit 3: A=1, B=0, Cin=1 → Sum=0, Cout=1 Result: 10001₂ = 17 ✔ (11 + 6 = 17) The 5th bit (C₄=1) is the overflow out of a 4-bit adder. For UNSIGNED numbers this means the result 17 exceeds the 4-bit range (0–15), so C₄ is the unsigned carry/overflow flag.

Worked numerical 2 — propagation delay

A full adder has a Sum delay of 12 ns and a Carry delay of 8 ns. Find the worst-case delay for a 4-bit and a 32-bit ripple-carry adder.

Worst case: the carry must ripple through all stages, then the last stage computes its Sum. 4-bit adder: carry through stages 0,1,2 = 3 × 8 = 24 ns final Sum at stage 3 = 12 ns TOTAL = 36 ns → maximum clock ≈ 1/36 ns = 27.8 MHz 32-bit adder: carry through 31 stages = 31 × 8 = 248 ns final Sum = 12 ns TOTAL = 260 ns → maximum clock ≈ 3.8 MHz ✗ hopeless for a modern CPU With CARRY LOOKAHEAD (4-bit blocks, 2 gate levels each): Generate G_i = A_i·B_i Propagate P_i = A_i ⊕ B_i C_{i+1} = G_i + P_i·C_i — all computed in parallel 32-bit lookahead ≈ 5 gate levels ≈ 40 ns → ~25 MHz, over 6× faster This is why every real ALU uses lookahead, not ripple.

Worked numerical 3 — BCD addition and the correction

Add 0111 (7) + 0110 (6) in BCD. Show why a correction is needed.

Straight binary addition: 0111 (7) + 0110 (6) ─────── 1101 (13 in binary) But 1101 is NOT a valid BCD digit — BCD only allows 0000 to 1001 (0 to 9). The codes 1010–1111 are illegal. CORRECTION RULE: if the sum exceeds 1001, or a carry was generated, ADD 0110 (6): 1101 + 0110 ─────── 1 0011 ↓ ↓ carry 3 → BCD result: 1 3 = 13 ✔ Why add 6? Because BCD skips six codes (1010–1111) between 9 and the next decade. Adding 6 jumps over the gap. Another example: 8 + 5 1000 + 0101 = 1101 (>9, correct) 1101 + 0110 = 1 0011 → 13 ✔ And 4 + 3 (no correction needed): 0100 + 0011 = 0111 = 7 ✔ (≤ 9, leave it alone)

💡 Exam angle: draw both truth tables and derive Sum = A⊕B⊕Cin and Cout = AB + Cin(A⊕B) — a standard 5-mark question. The full adder from two half adders plus an OR is often asked as a diagram. The high-value extra is explaining why ripple carry is slow and naming carry-lookahead as the fix with its G and P equations.

Syllabus points

Half & full adder; binary addition (numerical)

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