Encoder

Digital Logic & Microprocessor — Combinational and Arithmetic Circuits, NEC licence examination syllabus (Nepal Engineering Council).

Encoders: the reverse of a decoder

Sixteen keys on a keypad, four wires to the processor. That conversion is an encoder.

A decoder expands a code into many lines. An encoder compresses many lines back into a code — which is what happens every time you press a key: one of many switches closes, and the keyboard controller reports a compact binary number. The complication, and the reason priority encoders exist, is what to do when two keys are pressed at once.

Basic encoder

A 2ⁿ-to-n encoder: 2ⁿ inputs, n outputs. Assumes exactly ONE input is active. 4-to-2 encoder: D₃ D₂ D₁ D₀ | Y₁ Y₀ ────────────┼─────── 0 0 0 1 | 0 0 0 0 1 0 | 0 1 0 1 0 0 | 1 0 1 0 0 0 | 1 1 Equations: Y₁ = D₂ + D₃ Y₀ = D₁ + D₃ Two problems with this simple version: 1. If NO input is active, output is 00 — the same as D₀. Ambiguous. 2. If TWO inputs are active, the output is garbage.

Priority encoder — the practical version

Resolves multiple simultaneous inputs by ranking them. The HIGHEST-numbered active input wins; lower ones are ignored. An extra VALID output flags "at least one input is active", resolving the all-zeros ambiguity. 4-to-2 priority encoder (X = don't care): D₃ D₂ D₁ D₀ | Y₁ Y₀ | V ────────────┼───────┼─── 0 0 0 0 | x x | 0 ← nothing pressed 0 0 0 1 | 0 0 | 1 0 0 1 X | 0 1 | 1 ← D₀ ignored 0 1 X X | 1 0 | 1 ← D₁,D₀ ignored 1 X X X | 1 1 | 1 ← D₃ wins over everything Equations: Y₁ = D₃ + D₂ Y₀ = D₃ + D₂'D₁ V = D₃ + D₂ + D₁ + D₀

Look at Y₀'s equation: D₃ + D₂'D₁. The D₂' term is the priority logic — D₁ only contributes when D₂ is inactive. Every priority encoder equation has this shape: each input is ANDed with the complements of all higher-priority inputs. That's the whole mechanism.

Worked numerical 1 — 8-to-3 priority encoder equations

Derive the output equations for an 8-to-3 priority encoder with D₇ highest priority.

Each output bit is 1 for the input numbers whose binary code has a 1 in that position, guarded by higher priorities. Y₂ (MSB) — set for inputs 4,5,6,7: Y₂ = D₇ + D₆ + D₅ + D₄ Y₁ — set for inputs 2,3,6,7: Y₁ = D₇ + D₆ + D₅'D₄'D₃ + D₅'D₄'D₂ = D₇ + D₆ + D₅'D₄'(D₃ + D₂) Y₀ (LSB) — set for inputs 1,3,5,7: Y₀ = D₇ + D₆'D₅ + D₆'D₄'D₃ + D₆'D₄'D₂'D₁ V = D₇+D₆+D₅+D₄+D₃+D₂+D₁+D₀ Trace an example: D₅ and D₂ both active, others 0. Y₂ = 0+0+1+0 = 1 Y₁ = 0+0+ (0·1·(0+1)) = 0 [D₅'=0 kills the term] Y₀ = 0 + (1·1) + 0 + 0 = 1 Output = 101 = 5 ✔ — D₅ won, D₂ correctly ignored.

Worked numerical 2 — keypad encoder

A 16-key keypad must report which key is pressed. Design the interface and compare a direct encoder against matrix scanning.

DIRECT ENCODER approach: 16 keys → 16-to-4 priority encoder Wires needed: 16 into the encoder, 4 out + 1 valid Chip pins used: 16 inputs — expensive MATRIX SCANNING approach: Arrange the 16 keys as a 4×4 grid. Wires: 4 rows + 4 columns = 8 total (half as many) Method: drive one row low at a time, read the columns. If column 2 reads low while row 1 is driven, the key at (row 1, col 2) is pressed. Key number = row × 4 + column Example: row 2, column 3 → key 2×4 + 3 = 11 Scanning saves wires but needs software (or a scanning counter) and takes time. For 16 keys the trade is close; for a 104-key keyboard, matrix scanning is the only sane option — 104 direct wires would be absurd.

Worked numerical 3 — interrupt priority

Four devices raise interrupts. Use a priority encoder so the CPU always services the most urgent. What happens if devices 1 and 3 interrupt simultaneously?

Assign priorities: D₃ = power failure (most urgent) D₂ = disk controller D₁ = keyboard D₀ = printer (least urgent) Encoder outputs Y₁Y₀ form the interrupt vector number, and V drives the CPU's interrupt request line. Simultaneous D₃ (power fail) and D₁ (keyboard): Y₁ = D₃ + D₂ = 1 + 0 = 1 Y₀ = D₃ + D₂'D₁ = 1 + ... = 1 Output = 11 = 3 → the CPU services POWER FAILURE ✔ V = 1 → interrupt requested The keyboard's request stays asserted. After the power-fail handler finishes, the encoder now sees only D₁, outputs 01, and the keyboard is serviced next. Nothing is lost — the requests are simply ordered. This is precisely how the 8259 Programmable Interrupt Controller works, and it's why interrupt priorities exist in every CPU.

💡 Exam angle: the likely question is "differentiate encoder and priority encoder" — answer with the two failure modes of a plain encoder (ambiguous all-zeros, garbage on multiple inputs) and how priority plus a VALID output fixes both. For equations, remember the pattern: each input is ANDed with the complements of all higher-priority inputs.

Syllabus points

Encoder; priority encoder

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