Computer Organization & Embedded System β Input-Output Organization and Multiprocessor, NEC licence examination syllabus (Nepal Engineering Council).
Modes of Transfer: three ways to move data, three different CPU costs
The whole point of interrupts and DMA is to stop wasting CPU time.
ποΈ Programmed I/O (Polling)
WhatThe CPU repeatedly checks the device's status register in a tight loop until it's ready, then transfers one word.
Why it's costlySimple to program, but the CPU is 100% busy-waiting β wasting huge amounts of time on a slow device.
Example numerical:
A device produces 1 byte every 1ms. CPU checks status every 1ΞΌs.
β CPU wastes ~999 out of every 1000 checks just polling β pure waste.
This is exactly why polling is avoided for slow devices.
π Interrupt-Driven I/O
WhatThe CPU does other useful work, and the device interrupts it only when it's actually ready.
Why it's betterFar more efficient than polling, but each interrupt still has overhead (saving/restoring CPU state).
π DMA
WhatFor bulk transfers (like disk blocks), even interrupt-per-word is too slow β DMA lets a separate controller move an entire block directly.
Why it winsOnly interrupts the CPU once, at the very end of the whole block β covered in full detail next.
π‘ Rank programmed I/O, interrupt-driven I/O, and DMA by "CPU involvement" (highest to lowest) β a very common short question.
Why DMA is not free
DMA is described as taking the CPU out of the transfer, which is true and slightly too generous.
The DMA controller and the CPU share one memory bus, and only one can use it at a time. Every word DMA moves is a bus cycle the CPU cannot have β cycle stealing. The CPU is not interrupted and does not wait for the device, but it does run slower during a large transfer, because its own memory accesses are competing.
π How DMA takes the bus
Cycle stealingOne word at a time, taking single bus cycles between the CPU's. The CPU slows slightly; the transfer takes longer.
Burst modeThe controller holds the bus until the whole block is moved. Fastest transfer, but the CPU stalls completely for the duration.
π‘ The choice mirrors the pipelining trade-off exactly: burst mode maximises throughput of the transfer while destroying the CPU's latency; cycle stealing protects responsiveness at the cost of a slower transfer. Which is right depends on whether anything else needs the CPU meanwhile.
The three modes, by what they cost
Moving 1,000 words from a device:
PROGRAMMED I/O CPU polls, then transfers each word itself
β CPU busy for the ENTIRE transfer
INTERRUPT-DRIVEN CPU works; device interrupts when ready
β 1,000 interrupts, each with context-switch
overhead, and the CPU still copies every word
DMA CPU sets up the transfer, then works
β ONE interrupt at the end; the controller
moves all 1,000 words itself
The step that matters is the last one. Interrupt-driven I/O stops the CPU waiting, but the CPU still performs every copy. DMA removes it from the data path entirely β which is why the interrupt count drops from one per word to one per block, and why fast devices are unusable without it.
π‘ The rule that follows: use programmed I/O for a device so simple the setup would cost more than the transfer, interrupts for slow devices with occasional data, and DMA for anything moving blocks β which is exactly the ordering the speed table in the Peripheral Devices topic predicts.