I/O Modules

Computer Organization & Embedded System — Input-Output Organization and Multiprocessor, NEC licence examination syllabus (Nepal Engineering Council).

I/O Modules: the translator between CPU and device

The CPU never talks to a printer directly — it talks to a module that talks to the printer.

An I/O module is the hardware interface sitting between the system bus and a peripheral — think of it as a personal assistant that handles all the messy back-and-forth with a specific device, so the CPU doesn't have to.

📋 Inside an I/O Module

Data registerHolds data being transferred.

Status registerFlags like "device busy" or "data ready."

Control registerCommands the CPU sends to the device, like "start," "read," "write."

Example status register bit meaning: Bit 0 (Ready): 1 = device has data waiting Bit 1 (Busy): 1 = device currently processing, don't disturb Bit 2 (Error): 1 = last operation failed

💡 Draw the I/O module's internal block diagram: data register, status register, control register, all connected to the system bus on one side and the device on the other.

How the CPU reaches those registers

The chapter lists the three registers without saying how the CPU addresses them. There are two schemes, and comparing them is a standard question.

🗺️ Memory-mapped versus isolated I/O

Memory-mappedDevice registers occupy addresses in the ordinary memory space. The CPU reads and writes them with the same load and store instructions it uses for memory.

Isolated (port-mapped)Devices live in a separate address space reached by dedicated IN and OUT instructions, with a control line telling the bus which space is meant.

⚖️ What each costs

Instruction setMemory-mapped needs no I/O instructions at all. Isolated needs extra opcodes.

Address spaceMemory-mapped consumes memory addresses — a real cost on small systems. Isolated leaves memory space untouched.

FlexibilityMemory-mapped lets the full range of addressing modes and pointer arithmetic apply to device registers. Isolated allows only what IN and OUT support.

ProtectionIsolated is easier to restrict, since I/O instructions can simply be made privileged.

Memory-mapped I/O has won on modern systems, essentially because address space stopped being scarce once addresses went to 32 and 64 bits. When memory was measured in kilobytes, spending addresses on devices was a genuine sacrifice — which is why older architectures used isolated I/O and some still carry both.

💡 Memory-mapped registers must be marked non-cacheable. A status register read from cache returns the value from the last read rather than the device's current state, so the CPU would poll a stale "not ready" forever. It is a classic embedded bug and a good exam answer to "what problem does caching cause for memory-mapped I/O?"

Reading the status register correctly

The bit definitions above are used with a mask, and the pattern is worth being able to write:

Wait until the device is ready: while ((status_register & 0x01) == 0) ; // bit 0 clear → not ready yet Check whether the last operation failed: if (status_register & 0x04) // bit 2 set → error handle_error();

💡 Masking with a bitwise AND isolates one flag from a register holding several. Testing the register as a whole — if (status_register) — is true whenever any bit is set, so it would report "ready" on an error with the ready bit clear. Questions on I/O programming often hinge on exactly that mistake.

Syllabus points

Function and structure (data, status, control registers)

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