RISC and CISC

Computer Organization & Embedded System — Control and Central Processing Units, NEC licence examination syllabus (Nepal Engineering Council).

RISC vs CISC: two philosophies, one goal

Simple-and-many vs complex-and-few.

Right now, whatever device you're reading this on almost certainly has either an ARM chip (your phone) or an x86 chip (most laptops/desktops) — and those two chips are living proof of the two philosophies below, still fighting it out today.

⚙️ CISC — Complex Instruction Set Computer

WhatGive programmers powerful, complex instructions that do a lot in one line — even if they take multiple clock cycles and complicated hardware to decode.

Wherex86 (Intel/AMD) — nearly every Windows laptop/desktop.

⚡ RISC — Reduced Instruction Set Computer

WhatKeep every instruction simple and uniform, ideally executing in one clock cycle, and let the compiler chain many simple instructions together to do complex work.

WhereARM — nearly every smartphone, including the one probably next to you right now.

RISC machines lean heavily on a clever trick called register windows — instead of saving/restoring registers on every function call (slow), the CPU has many physical register sets and just "slides the window" to give each function its own fresh set instantly.

Feature	CISC	RISC
Instruction set size	Large, complex	Small, simple
Cycles per instruction	Multiple	Mostly 1
Addressing modes	Many	Few
Compiler role	Simpler	Does more work

💡 Memorize this table as your ready-made 5-point comparison answer.

Syllabus points

CISC characteristics
RISC characteristics (incl. register windows)
Comparison

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