π Where this lives: the anti-lock braking system in a car must decide whether to release a wheel within milliseconds; an answer that is correct but arrives 50 ms late is not a slower answer, it is a crash. That is the whole idea: in a real-time system, a deadline is part of the specification, not a performance goal. And it is not only vehicles and pacemakers β an audio interface that misses its buffer deadline produces a click you can hear, and a video game that misses its frame deadline stutters visibly. Search "hard versus soft real time deadline correctness".
What makes a system real-time
U β€ n(2^(1/n) β 1) With n = 3, U = 75 %.
Add tasks and watch the bound fall from 100% towards about 69%. Below the bound, rate-monotonic scheduling is guaranteed to meet every deadline; above it, the set may still work but the guarantee is gone. This is why a real-time CPU is deliberately left with idle capacity.
A REAL-TIME SYSTEM is a software system where the correct
functioning of the system depends on the RESULTS PRODUCED BY THE
SYSTEM AND THE TIME AT WHICH THESE RESULTS ARE PRODUCED.
A SOFT REAL-TIME SYSTEM is a system whose operation is
DEGRADED if results are not produced according to the
specified timing requirements.
β a late result is worth less, but the system continues.
Video streaming, telemetry collection, a user interface.
A HARD REAL-TIME SYSTEM is a system whose operation is
INCORRECT if results are not produced according to the timing
specification.
β a late result is a FAILURE, of the same kind as a wrong
result. Braking control, flight control, a pacemaker.
(a FIRM real-time system is sometimes distinguished: a late
result is useless but not harmful β a missed frame is simply
dropped.)
THE POINT THAT IS EASY TO MISS: "real-time" does not mean
"fast". It means PREDICTABLE. A system that usually responds in
1 ms but occasionally takes 200 ms is worse, for real-time
purposes, than one that always takes 20 ms. Average
performance is nearly irrelevant; the WORST CASE is the
specification. This is why real-time systems avoid garbage
collection, dynamic memory allocation, and unbounded loops β
not because they are slow, but because their worst case is
hard to bound.
STIMULUS / RESPONSE SYSTEMS β the standard way to think about
real-time design. A real-time system can be considered as a
system that responds to external events. To design it, you
identify the stimuli and the associated responses.
TWO CLASSES OF STIMULI:
PERIODIC STIMULI occur at predictable time intervals.
Example: the system may examine a sensor
every 50 ms and take action depending on
the value.
APERIODIC STIMULI occur irregularly, and are usually
signalled using the computer's INTERRUPT
mechanism. Example: an operator pressing
an emergency stop.
A real-time system is therefore usually a set of concurrent
cooperating processes, and the architecture must handle both
kinds of stimulus.
The design process and the architecture
A REAL-TIME SYSTEM DESIGN PROCESS β the standard steps:
1. IDENTIFY THE STIMULI to be processed and the required
responses to these stimuli.
2. For each stimulus and response, IDENTIFY THE TIMING
CONSTRAINTS.
3. AGGREGATE the stimulus and response processing into a number
of CONCURRENT PROCESSES. A process may be associated with
each class of stimulus and response.
4. For each stimulus and response, DESIGN ALGORITHMS to carry
out the required computations. These must be designed before
decisions on process timing, because the algorithm's
execution time determines whether the deadline is feasible.
5. DESIGN A SCHEDULING SYSTEM which ensures that processes are
started in time to meet their deadlines.
6. INTEGRATE the system under the control of a REAL-TIME
EXECUTIVE.
THE SENSOR/ACTUATOR PROCESS ARCHITECTURE β the canonical
structure:
ββββββββββββ βββββββββββββ ββββββββββββββ
β sensor ββββΆβ data ββββΆβ actuator β
β process β β processor β β control β
ββββββ¬ββββββ βββββββ¬ββββββ βββββββ¬βββββββ
β β β
SENSOR (compute) ACTUATOR
Β· sensors are POLLED periodically or generate interrupts
Β· the data processor carries out the computation and decides
on the response
Β· the actuator control process converts the decision into a
signal for the physical device
THE REAL-TIME EXECUTIVE β a specialised operating system that
manages processes and resource allocation in a real-time system.
It starts and stops processes, and schedules process execution.
Its components:
REAL-TIME CLOCK provides information to schedule
processes periodically
INTERRUPT HANDLER manages aperiodic requests for service
SCHEDULER examines the processes that can be
executed and chooses one
RESOURCE MANAGER allocates memory and processor
resources to a scheduled process
DISPATCHER starts the execution of a process
CONFIGURATION MANAGER (in systems that must keep running)
supports dynamic reconfiguration
FAULT MANAGER detects and manages faults without
stopping the system
PROCESS PRIORITY LEVELS β two are normally distinguished:
INTERRUPT LEVEL the highest priority, allocated to
processes needing a very fast response.
One of these is the real-time clock
process.
CLOCK LEVEL allocated to periodic processes.
Scheduling, and whether the deadlines can be met
THIS IS THE MATHEMATICAL CORE OF REAL-TIME DESIGN: given a set
of periodic tasks, CAN the deadlines be met at all?
A periodic task i is described by:
C_i worst-case execution time (WCET)
T_i period (also the deadline, in the simple model)
U_i = C_i / T_i its utilisation β the fraction of the
processor it needs
TOTAL UTILISATION: U = Ξ£ (C_i / T_i)
IF U > 1 the task set is INFEASIBLE on one processor, full
stop β you are asking for more work than time exists. No
scheduler helps.
RATE MONOTONIC SCHEDULING (RMS) β fixed priorities, shortest
period gets highest priority. The classic Liu & Layland
sufficient condition:
U β€ n (2^(1/n) β 1)
n = 1 1.000
n = 2 0.828
n = 3 0.780
n = 4 0.757
n = 5 0.743
n = 10 0.718
n β β ln 2 β 0.693
So with many tasks under fixed-priority scheduling, you can
only safely count on about 69% of the processor. The rest is
the price of guaranteed schedulability.
EARLIEST DEADLINE FIRST (EDF) β dynamic priorities; whichever
task's deadline is nearest runs next. Its condition is simply:
U β€ 1
EDF can use the whole processor. Its cost: priorities change
at run time, so behaviour under overload is harder to predict
(a missed deadline can cascade), and it is more complex to
implement.
WORKED β three tasks in a licence-plate reader controller:
task C_i (ms) T_i (ms) U_i
ββββββββββββββββββββββββββββββββββββββββββββ
read camera 12 50 0.240
detect plate 28 100 0.280
log + display 8 40 0.200
ββββββββββββββββββββββββββββββββββββββββββββ
U total = 0.720
UNDER EDF: U = 0.720 β€ 1 β SCHEDULABLE β
UNDER RMS: bound for n = 3 is 0.780
0.720 β€ 0.780 β SCHEDULABLE β
NOW SUPPOSE plate detection is improved and takes 34 ms:
U = 0.240 + 0.340 + 0.200 = 0.780
EDF: 0.780 β€ 1 β still schedulable β
RMS: 0.780 β€ 0.780 β exactly at the bound, so
the sufficient condition just holds β but with no
margin at all β
AND AT 40 ms detection:
U = 0.240 + 0.400 + 0.200 = 0.840
EDF: 0.840 β€ 1 β schedulable β
RMS: 0.840 > 0.780 β the RMS test FAILS. Note
carefully: the Liu & Layland bound is SUFFICIENT, not
necessary β failing it does not prove the set is
unschedulable, but you can no longer guarantee it
without a full response-time analysis.
THE DESIGN LESSON: a 12-millisecond increase in
computation that pushed C from 28 to 40 ms changed the system from
provably safe to unprovable. In real-time work, MAKING CODE
DO MORE IS A SCHEDULABILITY DECISION, and it must be
re-analysed, not merely benchmarked.
WHY WCET IS THE HARD PART: every number in that table is a
WORST case, and worst cases are genuinely difficult to establish
on modern hardware. Caches, branch prediction, pipelines, DRAM
refresh and speculative execution all make execution time
data-dependent and history-dependent. This is why hard real-time
systems often use simpler processors deliberately, disable
caches, or use static analysis tools to bound WCET rather than
measuring it β a measured maximum is not a proven bound.
PRIORITY INVERSION β the classic real-time failure, worth
knowing by name:
a HIGH-priority task waits on a lock held by a LOW-priority
task, which is itself preempted by a MEDIUM-priority task. The
high-priority task is now effectively blocked by the medium
one, inverting the priorities. The famous case is the Mars
Pathfinder rover in 1997, which repeatedly reset on the
surface of Mars for exactly this reason. The fix is PRIORITY
INHERITANCE: the lock holder temporarily inherits the priority
of the highest-priority task waiting on it.
The detection-algorithm example is the transferable lesson: improving a computation from 28 ms to 40 ms of work moved the system from provably schedulable to merely probably schedulable. In real-time engineering a performance change is a correctness change, and it must be re-analysed rather than benchmarked β which is a different professional habit from ordinary software work.
π Go further: the reason garbage collection is treated as disqualifying deserves a look, because it has changed. Classic stop-the-world collectors introduce unbounded pauses, which is fatal for hard deadlines. But modern low-latency collectors (ZGC, Shenandoah) advertise sub-millisecond pauses, and there is a whole subfield of real-time garbage collection with provable bounds. The interesting question is not "is GC allowed?" but "can this collector's worst-case pause be bounded and proven, and is that bound smaller than my slack?" β which is the same question you ask of every component in a real-time system. Search "real-time garbage collection bounded pause guarantees".
π‘ Exam angle: define real-time system, and distinguish hard from soft real-time β that a late result in a hard system is incorrect, not merely degraded, is the key sentence. Distinguish periodic from aperiodic stimuli and say how each is detected (polling versus interrupts). List the real-time system design process steps and the real-time executive components (clock, interrupt handler, scheduler, resource manager, dispatcher, and in continuously running systems configuration and fault managers), plus the two priority levels (interrupt level, clock level). Be ready to compute U = Ξ£ C/T and test it against the EDF bound (U β€ 1) and the RMS bound (n(2^(1/n) β 1)).
Syllabus points
Designing real-time systems
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