Same three layers as a signal transistor, but every dimension is chosen to move heat.
A 2N3904 handles 200 mW. A 2N3055 handles 115 W — nearly 600 times more. They work by identical physics, so what changed? Everything about the geometry and packaging, all of it aimed at one problem: getting heat out of the silicon fast enough to keep the junction below its limit.
🔧 How a power BJT differs
Large die areaSpreads current so local current density stays safe, and gives a big path for heat to leave. Also means high capacitance, hence slower switching.
Thick, lightly doped collectorNeeded to withstand high V_CE without breaking down. But it adds series resistance, so V_CE(sat) is higher (~1 V) than a small-signal device's (~0.2 V).
Low βTypically only 20–100, and it falls as I_C rises. So driving a power BJT hard needs substantial base current — which is why Darlington pairs are common.
Metal packageTO-3, TO-220, TO-247 — the collector is bonded to a metal tab for the heatsink, which is why the tab is usually electrically live.
The thermal chain
T_j = T_a + P(θ_jc + θ_cs + θ_sa) With P = 10 W, Ta = 30 °C, jc = 1 °C/W, cs = 0.5 °C/W, sa = 3 °C/W, Tj = 75 °C, rise = 45 °C.
The three thermal resistances add in series, so the largest one dominates. Sink-to-air is usually the biggest — which is why a bigger heatsink helps more than a better device, and why forgetting thermal compound (raising case-to-sink) destroys parts that were otherwise within rating.
Heat flows through a series of thermal resistances, exactly
like current through series resistors:
T_j = T_a + P × (θ_jc + θ_cs + θ_sa)
θ_jc = junction to case (fixed by the device, ~1 °C/W)
θ_cs = case to sink (~0.5 °C/W with paste, ~2 without)
θ_sa = sink to ambient (chosen by heatsink selection)
Maximum allowable dissipation:
P_max = (T_j(max) − T_a)/θ_total
Note P_max DEPENDS ON AMBIENT. A "115 W" transistor delivers
115 W only at a 25 °C case temperature — an unrealistic
condition in a real chassis.
Derating and the safe operating area
Derating: above 25 °C the allowable dissipation falls
linearly to zero at T_j(max).
Derating factor = 1/θ_jc (W/°C)
Safe Operating Area (SOA) — four simultaneous limits:
1. I_C(max) — bond wire / current density limit
2. V_CE(max) — avalanche breakdown limit
3. P_max hyperbola — V×I = constant thermal limit
4. SECOND BREAKDOWN — a localised hot-spot limit that
cuts the corner off the P_max curve
The operating point must stay inside ALL FOUR.
Second breakdown is the failure mode unique to power BJTs and the reason MOSFETs took over switching. V_BE falls as temperature rises. So a slightly hotter spot on the die draws more current, which makes it hotter still. The current concentrates into a narrow filament and melts the silicon — all in microseconds. A MOSFET's R_DS(on) rises with temperature, so a hot spot draws less current: it self-balances. That single sign difference makes MOSFETs far more rugged.
Worked numerical 1 — heatsink selection
A power BJT must dissipate 25 W. T_j(max) = 150 °C, θ_jc = 1.5 °C/W, θ_cs = 0.5 °C/W, ambient 45 °C. Find the required heatsink θ_sa.
Total allowable thermal resistance:
θ_total = (T_j(max) − T_a)/P = (150 − 45)/25
= 105/25 = 4.2 °C/W
Subtract the fixed parts:
θ_sa = 4.2 − 1.5 − 0.5 = 2.2 °C/W
A 2.2 °C/W heatsink is a substantial extruded aluminium
block, roughly 100 × 100 × 40 mm with fins.
Now apply a safety margin, designing for T_j = 125 °C:
θ_total = (125 − 45)/25 = 3.2 °C/W
θ_sa = 3.2 − 2.0 = 1.2 °C/W
Halving the junction temperature margin nearly doubled the
heatsink requirement. This is why real designs either add a
fan or use two transistors in parallel.
Worked numerical 2 — derating
A transistor is rated 100 W at 25 °C case temperature, with T_j(max) = 175 °C. Find the derating factor, θ_jc, and the allowable dissipation at a 100 °C case.
Derating factor:
= P_rated/(T_j(max) − 25) = 100/(175 − 25)
= 100/150 = 0.667 W/°C
Thermal resistance junction-to-case:
θ_jc = 1/0.667 = 1.5 °C/W
At T_case = 100 °C:
P_allowed = (T_j(max) − T_case)/θ_jc
= (175 − 100)/1.5
= 50 W
Only HALF the nameplate rating at a realistic case
temperature. Designing to the 100 W figure would destroy
the device — this is the most common power-design error.
Worked numerical 3 — Darlington drive current
A power BJT with β = 25 must switch 10 A. Compare the base drive needed against a Darlington pair with β₁ = 100, β₂ = 25.
Single transistor:
I_B = I_C/β = 10/25 = 0.4 A = 400 mA
400 mA is far more than a logic gate or op-amp can
source — you'd need a driver stage.
Darlington pair (β_total = β₁ × β₂):
β_total = 100 × 25 = 2500
I_B = 10/2500 = 4 mA
4 mA is easily supplied by almost anything.
The cost: two V_BE drops in series, so
V_BE(total) ≈ 1.4 V, and V_CE(sat) ≈ 1.0–1.5 V
→ more conduction loss: P = 1.4 × 10 = 14 W
versus a single device's 1.0 × 10 = 10 W
100× easier to drive, 40% more heat. That trade is why
Darlingtons appear in relay and motor drivers where drive
simplicity matters more than a few watts.
💡 Exam angle: the heatsink calculation T_j = T_a + P·θ_total is the most likely numerical — write the thermal chain as a series circuit and it becomes trivial. For descriptive marks, name the four SOA limits and explain second breakdown as the thermal-filament mechanism unique to BJTs. Mentioning that MOSFETs avoid it (positive temperature coefficient of R_DS) is the answer to "why are MOSFETs preferred for switching?"
Syllabus points
Power transistor characteristics
Create a free account to tick topics off, take notes as you read, watch the video lessons and get a day-by-day study plan built around your exam date.